1. Field of the Invention
The present invention relates to a switching regulator having a short-circuit protecting circuit in a semiconductor integrated circuit device.
2. Description of the Related Art
An electronic system having as a power supply a switching regulator is widely used. When a short-circuit state is caused by the connection of an excessive load to an output terminal of a switching regulator due to some reasons, an excessive current is caused to flow through the switching regulator to break down the switching regulator. To prevent the short circuit, the switching regulator is provided with a short-circuit protecting circuit for protecting short-circuit breakdown.
The short-circuit protecting circuit of the switching regulator outputs a short-circuit signal after a short-circuit state caused in the switching regulator continues for a predetermined time period. The predetermined time period is a delay time required to prevent a malfunction such as stop of a system due to noises.
FIG. 2 shows a short-circuit protecting circuit of a conventional switching regulator. The short-circuit protecting circuit includes a constant current circuit 101, a capacitor 102, an NMOS transistor 103, a comparator 104, a short-circuit state detecting circuit 107, a latch circuit 108, and a reference voltage source 109.
The short-circuit state detecting circuit 107 is designed such that when a load applied to the switching regulator is normal, i.e., the switching regulator is in a nonshort-circuit state, a detection signal “HIGH” is outputted. Thus, the NMOS transistor 103 holds an ON state, and a voltage level at a noninverting terminal of the comparator 104 is “LOW”. Hence, a level of an output signal from the comparator 104 is held at “LOW”, and the latch circuit 108 is reset to a level “LOW”.
When the switching regulator becomes a short-circuit state, the short-circuit state detecting circuit 107 outputs a signal “LOW”, and thus the NMOS transistor 103 is turned OFF. When the voltage level at the noninverting terminal of the comparator 104 gradually increases from “LOW” and exceeds a reference voltage after a lapse of a delay time determined depending on the constant current circuit 101 and the capacitor 102, the level of the output signal from the comparator 104 changes from “LOW” to “HIGH”. Then, the latch circuit 108 is set at a level “HIGH” to output a short-circuit signal. An output current limiting circuit (not shown) of the switching regulator is activated in accordance with the short-circuit signal, thereby preventing the short-circuit breakdown of the switching regulator. Note that when the short-circuit state is ended, the latch circuit 108 is reset to a level “LOW” in accordance with a reset signal (not shown) and the short-circuit signal disappears (refer to JP 2001-94407 A).
However, in the short-circuit protecting circuit of the conventional switching regulator, a time point when an inverted signal is inputted to the comparator 104 after the capacitor 102 is charged with electricity is regarded as a time point when the short-circuit signal is generated. Hence, in order to obtain a long delay time, it is necessary to increase a capacity of the capacitor 102. Since it is difficult to build a capacitor having a large capacity in a semiconductor integrated circuit, an outside capacitor is required to obtain a predetermined delay time. This is an obstacle to miniaturization of the system.